By Chenxin Zhang, Liang Liu, Viktor Öwall
ISBN-10: 3319240021
ISBN-13: 9783319240022
ISBN-10: 3319240048
ISBN-13: 9783319240046
This booklet specializes in domain-specific heterogeneous reconfigurable architectures, demonstrating for readers a computing platform that's versatile sufficient to aid a number of criteria, a number of modes, and a number of algorithms. The content material is multi-disciplinary, protecting parts of instant conversation, computing structure, and circuit layout. The platform defined offers real-time processing potential with average implementation price, reaching balanced trade-offs between flexibility, functionality, and expenditures. The authors speak about effective layout equipment for instant communique processing systems, from either an set of rules and structure layout point of view. insurance additionally contains computing structures for various instant applied sciences and criteria, together with MIMO, OFDM, titanic MIMO, DVB, WLAN, LTE/LTE-A, and 5G.
Read or Download Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing: From Algorithm to Architecture PDF
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Extra resources for Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing: From Algorithm to Architecture
Sample text
The remainder of this chapter is organized as follows. 2 discusses related work with a focus on architectures designed specifically for digital wireless communication. 3 introduces the reconfigurable cell array architecture, presents details of each resource cell, and describes different ways of managing system configurations. 4 presents design flow for constructing a reconfigurable cell array. 5 summarizes this chapter. 2 Prior Work and State-of-the-Art A number of reconfigurable architectures have been proposed in open literature for a variety of application domains [1, 10, 12, 18, 30, 35].
C. Spiegel, J. Berkmann, Z. Bai, T. Scholand, C. Drewes, MIMO schemes in UTRA LTE, a Comparison, in IEEE Vehicular Technology Conference (VTC), May 2008, pp. 2228–2232 18. E. Tell, Design of programmable baseband processors. D. thesis, Department of Electrical Engineering, Linköping University, 2005 19. United Nations Foundation and The Vodafone Foundation, mHealth for development: the opportunity of mobile technology for healthcare in the developing world, 2011 20. J. Viterbi, Error bounds for convolutional codes and an asymptotically optimum decoding algorithm.
3 Architecture Overview 41 transaction is found, marked with ‘O’ in Fig. 10b. A transaction is considered to be a candidate when it is recorded in the log table and the corresponding output packet queue is not full. With this approach, all transactions are assigned with priorities according to their position in the log table. In contrast, the round-robin algorithm provides a starvation-free arbitration, which assigns time slices to each entry in equal portions and handles all transactions in order without priority.
Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing: From Algorithm to Architecture by Chenxin Zhang, Liang Liu, Viktor Öwall
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