By Mohamed Elgamel, Magdy A. Bayoumi
ISBN-10: 0387258701
ISBN-13: 9780387258706
ISBN-10: 0387293663
ISBN-13: 9780387293660
Interconnect has develop into the dominating think about settling on procedure functionality in nanometer applied sciences. devoted to this topic, Interconnect Noise Optimization in Nanometer Technologies offers perception and instinct into format research and optimization for interconnect in excessive velocity, excessive complexity built-in circuits.
The authors compile a wealth of data featuring various CAD algorithms and strategies for synthesizing and optimizing interconnect. sensible elements of the algorithms and the types are defined with adequate info. The e-book investigates the simplest parameters in structure optimization. various post-layout optimization thoughts with complexity research and benchmarks exams are supplied. The effect crosstalk noise and coupling at the twine hold up is analyzed. Parameters that impact sign integrity also are considered.
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Extra resources for Interconnect Noise Optimization in Nanometer Technologies
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3 Wire spacing 66 Wire spacing can decrease the crosscapacitance value effectively . For example. The post-layout spacing heuristic^^ proposed a post-layout graphbased spacing algorithm. The framework spaces out wires after detailed routing has been finished. The crosstalk effect is based on crosstalk voltage glitches, as they do not consider the delay. The crosstalk effect from driver to sink is simply the superposition of all glitches of wires along the path. The potential disadvantage of this greedy operation is the poor utilization of space resources around a timing critical wire.
48 Figure 3-11. Wire aspect ratio scaling with technology ^ Nowadays, the crosscoupling capacitance between parallel neighboring wires, which can get routed together for long distances, are becoming of great importance compared to the wires self-capacitances. This can either lead to a large increase in delay, coupling noise, min delay, or power consumption problems, depending on the switching direction of neighboring wires. Avoiding these delay and noise problems would involve drastically increased wire spacing or extensive shielding.
3. Interconnect Noise Analysis and Optimization Techniques 37 The graph-based optimizer preroutes wires on the global routing grids incrementally in two stages — net order assignment and space relaxation^^. The timing delay of each critical path is calculated taking into account interconnect coupling capacitance. The objective is to reduce the delays of critical nets with negative timing slack values by adding extra wire spacing. 4 Shield insertion Shield insertion is another technique for decreasing crosstalk.
Interconnect Noise Optimization in Nanometer Technologies by Mohamed Elgamel, Magdy A. Bayoumi
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