By Sajjan G Shiva
ISBN-10: 0585182086
ISBN-13: 9780585182087
Read Online or Download Introduction to logic design PDF
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Additional info for Introduction to logic design
Sample text
The semantics of parametric timed automata is given in the following under the form of a labeled transition system. – Let A = (Σ, Q, q0 , X, P, K, I, →) be a parametric timed automaton. The symbolic semantics of A is the labeled transition system (S, S0 , ⇒) over Σ where S = {(q, C) ∈ Q × L(X ∪ P ) | C ⊆ I(q)}, ∧H−1 S0 = {(q0 , K ∧ I(q0 ) ∧ i=1 xi = xi+1 )} 16 The Inverse Method a a d and a transition (q, C) ⇒ (q ′ , C ′ ) belongs to ⇒ if ∃C ′′ : (q, C) → (q ′ , C ′′ ) → (q ′ , C ′ ), with: a • discrete transitions (q, C) → (q ′ , C ′ ) if there exists (q, g, a, ρ, q ′ ) ∈ → and (( ) ) C ′ = C(X) ∧ g(X) ∧ X ′ = ρ(X) ↓X ′ ∪P ∧ I(q ′ )(X ′ ) , and ′ [X ←X] d • delay transitions (q, C) → (q, C ′ ) with C ′ = C↑ ∧ I(q)(X).
We have ∩ S = Post ∗A(K) ({s0 }) and K0 = (q,C)∈S C↓P . – We have K0 ⊆ K. P ROOF. 2, for ∩ all states (q, C) ∈ S, we have C↓P ⊆ K, since S = Post ∗A(K) ({s0 }). As K0 = (q,C)∈S C↓P , then K0 ⊆ K. – We have π0 |= K0 . P ROOF. e. π0 |= C↓P , for all (q, C) ∈ S). ∩ Thus, the intersection K0 of the constraints associated with the states of S, that is (q,C)∈S C↓P , is satisfied by π0 . Let us now show that the set of traces in the concrete semantics and the set of traces in the symbolic semantics are equal.
The initial location q0 corresponds to the initial levels of the signals according to the environment. 1(b) on page xv. Therefore, we have the implicit constraint TSetup ≤ TLO ∧ THold ≤ THI . 1. Parametric timed automaton modeling a “NOT” gate We consider that the circuit has a good behavior if it verifies the following property Prop 1 : “every trace contains both Q↗ and CK ↘ , and Q↗ occurs before CK ↘ ”. That is, the raise of signal Q must occur before the fall of signal CK . ) Let us study the behavior of the flip-flop circuit under π0 .
Introduction to logic design by Sajjan G Shiva
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