By Anupam Chattopadhyay, Rainer Leupers, Heinrich Meyr, Gerd Ascheid
ISBN-10: 1402092962
ISBN-13: 9781402092961
ISBN-10: 1402092970
ISBN-13: 9781402092978
Increasing complexity of contemporary embedded platforms calls for process designers to ramp up their layout productiveness with no compromising functionality objectives. this is often promoted via sleek digital method point (ESL) concepts. Language-driven Exploration and Implementation of partly Re-configurable ASIPs addresses a tremendous phase of the ESL sector by means of modeling in part re-configurable processors through high-level structure Description Language (ADL). This process additionally tricks an impending evolution within the zone of re-configurable process layout.
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Even then, when connected to a base processor, this accounts for few thousand cycles [125] for a processor running at hundreds of MHz. In [125], a dynamic programming-based algorithm is proposed to obtain the optimal spatial (for spatially exclusive custom instructions) and temporal (for temporally exclusive custom instructions) partitioning. 5 Motivation The concept of flexibility was introduced with the expansion of design space of digital systems. The most flexible digital system consists of a GPP realized on a post-fabrication customizable hardware.
The functional units can have various design choices as listed below. r r r Operation Granularity : The operations can have various granularity ranging from bit-level to word-level or even higher. Parallelism : The functional unit can offer parallelism within it. A further design choice is the number of parallel data flows allowed by it. Functionality : This is dictated by the target set of applications. The signal processing algorithms often require subsequent multiplication and accumulation for filtering.
The control sequence of the pipelined re-configurable block is extracted from the C-based application kernel by instruction scheduling. The re-configurable logic cells are fine-grained in nature with special extensions for fast carry propagation. To reduce the re-configuration overhead, configuration caching as well as multi-context decoding is supported. MOLEN The major challenges of rASIP design, as identified in [51], were firstly, the instruction space explosion and secondly, the limited bandwidth between base processor and the re-configurable block.
Language-driven Exploration and Implementation of Partially Re-configurable ASIPs by Anupam Chattopadhyay, Rainer Leupers, Heinrich Meyr, Gerd Ascheid
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